The present disclosure relates to a method and an arrangement for analyzing a semiconductor element and to a method for manufacturing a semiconductor component.
Processes for manufacturing semiconductor components may utilize polymer materials. For example polymer layers, such as fluoropolymer layers, may be used as passivation layers for purposes of etch protection, in particular in deep reactive ion etching, DRIE, processes. Such processes may for example be used to generate surface structures like through-semiconductor-vias, TSVs, trenches, cavities or the like. Another example for polymer materials in the context of semiconductor manufacturing are photoresists used for example for lithographic structuring or surface processing. Furthermore, other processes, for example layer deposition or a layer structuring processes, may generate polymer residues. Although the polymer materials may be removed in principle, polymer residues may remain.
Fluoropolymer residue removal may for example be done by sequences including ashing and/or wet cleaning steps including for example amine stripping solutions. However, in particular with increasing aspect ratios of surface structures, not only does the removal of polymer residues become more difficult, but also the inspection and analysis thereof. However, polymer residues may cause poor adhesion of subsequently deposited layers, for example for TSV isolation, TSV metallization and/or back side metallization. The poor adhesion may cause a reduced device yield.
Existing approaches for polymer residue analysis may use scanning electron microscopy to inspect individual surface structures. These approaches are typically very time-consuming and costly and/or involve destructive inspection methods.